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 CLS 551
Key Features:
ccd linescan controller CCD Linescan controller Designed for Sony ILX 551 All clock signals included. Start of frame output. Selectable exposure time.
654
nc OSC te RESET nc VCC VCC nc ts0 ts1 ts2
7 8 9 10 11 12 13 14 15 16 17
nc nc GND nc nc nc nc nc
3 2 1 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
nc nc nc
CLS 551
Top View
SOS PCLK nc nc nc VCC nc CLK ROG nc nc
18 19 20 21 22 23 24 25 26 27 28
Overview:
The CLS 551 is an easy to use, complete ccd linescan controller, designed for the SONY ILX 551 linescan sensor. For operation the CLS 551 requires power +5 V only, and a 10 MHz TTL or CMOS clock input signal. Additional logic is not required. To provide more flexibility, the CLS 551has an interface to control exposure time and pixel clock. All inputs are connected to internal pull up resistors, so they can left unconnected if not required.
Interface:
The CLS 551 linescan controller includes all CCD-timing signals including pixel clock and exposure control. The digital interface provides user selectable pixel clock and exposure time. An output for pixel clock and start of frame facilitates the operation with an additional frame grabber. With an additional oscilloscope and a Sony IILX 551 CCD-sensor the CLS 551converts to a complete very low cost CCD-linescan camera with display. (See the application on the last page).
khs instruments
Absolute Maximum Ratings
VCC Supply voltage Input voltage applied Digital output current Storage temperature Operating temperature - 0.5 V to + 6 V - 0.5 to Vcc + 0.5 V 0 to 5 mA - 20 to 150 C 0 to 50 C
DC Characteristics
Output low voltage (8 mA) Output high voltage (-4 mA) Input pullup current Input low Voltage (max) Input high voltage (min) Power requirements: 0.4V 2.4V -0.15 mA 0.8 V 2.0V +5V 200mA
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
1/7
nc ps0 ps1 ps2 nc GND nc nc nc nc nc
Pin Configuration
654
nc OSC te RESET nc VCC VCC nc ts0 ts1 ts2
7 8 9 10 11 12 13 14 15 16 17
nc nc GND nc nc nc nc nc
3 2 1 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
nc nc nc
CLS 551
Top View
SOS PCLK nc nc nc VCC nc CLK ROG nc nc
44-Pin PLCC Pinout Diagram
18 19 20 21 22 23 24 25 26 27 28
Connections:
Signal Pin Pin Signal
nc ps0 ps1 ps2 nc GND nc nc nc nc nc
User Interface
Pinout description:
Pin Name
SOS PCLK ts0..ts1 te ps0..ps1
OSC
Pin Type
OUT OUT IN IN IN IN IN NC
Pin Description
Start of scan output, low active. Pixelclock output, low active. Exposure control. Exposure control external. Pixelclock control. Oscillator input CCD asynchron reset low active Do not connect!
SOS PCLK ts2 ts1 ts0 te
39 38 17 16 15 9
10 8 21 20 20
Reset
OSC
ps2 ps1 ps0
All inputs: 50 K pull up to VCC.
Reset nc
CCD Interface
Connections:
Signal Pin
CLK ROG 32 31
Pinout description:
Pin Name
CLK ROG
Pin Type
OUT OUT
Pin Description
Clock pulse Readout gate pulse
CLS 551
Power
Connections:
Signal Pin
GND GND VCC VCC VCC 1 23 12 13 34
Pinout description:
Pin Name
GND VCC
Pin Type
Power Power
Pin Description
Power Ground. Power + 5 V.
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
2/7
Osc Timing
tf OSC
tr
tl
th
Item OSC pulse Duty OSC frequency
*1 *1
Symbol tr, tf -
Min. 0 -
Typ. 50 10 10
Max. 20 10
Unit % ns MHz
OSC pulse rise / fall time
100 x th / (tl + th )
Exposure timer control
ts2 ts1 ts0
1 1 1 1 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 0 exposure time 2088 4096 8192 16384 32768 65536 extern
Note: For timing details see t16, page 4
Note) is the period of CLK ( = 200 ns at 5 MHz).
CLS 551
Pixelclock control
ps2 ps1 ps0 CLK 1/2 Osc 1/4 Osc 1/8 Osc 1/16 Osc (at 10 MHz CLK) ( 5 MHz) ( 2.5 MHz) ( 125 KHz) ( 62.5 KHz)
1 1 1 1
1 1 0 0
1 0 1 0
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
3/7
Clock Timing Diagram
Exposure time
CLS 551
ROG
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
4/7
PCLK
CLK
SOS
2048 1 1 2 48
Clock Timing
CLK
t3
t4
Item CLK pulse Duty
*1 *1
Symbol -
Min. -
Typ. 50
Max. -
Unit %
100 x t4 / (t3 + t4 )
ROG, CLK Timing
ROG
t9 CLK
t7
t11
CLS 551
Item ROG CLK pulse timing 1 ROG CLK pulse timing 2 ROG pulse period Note) is the period of CLK.
Symbol t7 t11 t9
Min. -
Typ. 10 6 8
Max. -
Unit ns ns ns
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
5/7
ROG, SOS Timing
ROG
SOS
t20
t21
Item ROG SOS pulse timing 1 ROG SOS pulse timing 2
Symbol t20 t21
Min. -10 -10
Typ. 0 0
Max. 10 10
Unit ns ns
CLK, PCLK Timing
CLK
PCLK
CLS 551
t22
t23
Item CLK PCLK pulse timing 1 CLK PCLK pulse timing 2
Symbol t22 t23
Min. -10 -10
Typ. 0 0
Max. 10 10
Unit ns ns
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
6/7
Application
CH 1: Trigger
Set oszilloscope to Timebase Trigger CH1 CH2 0.1 ms/DIV Intern CH1 5 V/DIV 1 V/DIV
CH 2:CCD-Signal
VCC +5V
nc nc nc
GND
10 MHz in
nc te RESET nc
nc ts0 ts1 ts2
6 5 4 3 2 1 44 43 42 41 40 7 39 8 OSC 38 9 37 10 36 CLS 551 11 35 12 VCC VCC 34 Top View 13 VCC 33 14 CLK 32 15 ROG 31 16 30 17 29 18 19 20 21 22 23 24 25 26 27 28
nc nc nc nc nc
nc nc
+9V
SOS PCLK nc nc nc nc
+
nc ps0 ps1 ps2 nc
GND
nc nc
CLS 551
GND
nc nc nc nc nc
ILX 551 See SONY ILX 551 datasheet for more details.
Fig. 1 Test circuit
www.khs-instruments.com
C551_01 Rev 1.01 / 06.2001 Specifications are subject to change without
7/7


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